How to design PCB for your radio project without thinking of EMI issues

When one starts designing (Printed Circuit Board), PCB for the radio project always faces issues, especially with EMI. The designer has several musts, i.e., define a correct stack up, decide the topology for the RF traces, calculate correct characteristic impedances, find a suitable place for the radio, shield the specific RF traces, or provide enough connections between the power planes. What about forgetting about all those things and trying to do just manufacturer recommendations plus well-known practices for PCB design?

An article will discuss the simple radio project, key messages, and advice for designers. The theoretical and practical aspects of the project will also be briefly discussed and summarized.

Electrical schematics design

Let’s start our design with the easiest part – the electrical schematic. Most manufacturers give detailed recommendations on how to build schematics with their Integrated Circuit (IC) and surrounding subcomponents. The most important ones are:

I. digital power supply, mostly decoupling capacitors, built-in dc/dc converter filters,

II. analog power supply, especially L-C filters,

III. Radio Frequency (RF) signals, recommendations for external passive/active antennas, their matching circuitries,

IV. external components such:

ㅤa. external oscillators,

ㅤb. dedicated pins/functions,

ㅤc. reset circuits,

ㅤd. programming interfaces such: joint-test-action-group (JTAG), serial-wire-debug (SWD) or device-firmware-update (DFU).

I have chosen the following part from STMicroelectronics: STM32WB5MMG for demonstration purposes, but you can choose whatever is most suitable for you and your design needs!

The STM32WB5MMG has the following hardware features:

1. an integrated chip antenna with best-in-class matching integrated passive devices (IPD) allowing radio signals ranges up to 75 m,
2. the RF core, which is suitable for the most popular Radio interfaces such as Bluetooth Low Energy (BLE) 5.4, Zigbee 3.0, and Open Thread (it is important to mention all of them are already fully certified with the IC that can make life easier when one wanted to apply this device inside the commercial product!),
3. the most typical frequency band of 2402-2480 MHz,
4. 1-Mbyte of FLASH memory, including 256-Kbyte SRAM shared between an Application (Cortex-M4) and the Radio Microcontroller Units (MCUs),
5. 68 GPIOs (i.e., for Your IOT sensors),
6. the SWD, DFU as well as JTAG programming ports (especially the second one can significantly reduce the cost of external flashing tools if tracing and full debugging are not necessary),
7. a typical low voltage transistor-transistor level (TTL) operation ranges up to 3.6 V (most of the pins are also backward compatible with the old Complementary metal-oxide-semiconductor (CMOS) technology of 5 V),
8. ultra-low power modes with complete shutdown and wakeup capabilities for a long-term operation on single tiny cell-coin batteries,
9. a fully integrated bill-of-material (BOM), including switch-mode power supplies (SMPS) with their passive components and low – and high-speed integrated external oscillators, can significantly reduce the cost of external material (which can be crucial in an era of electronics components shortage, especially by brokers from China 😊).

As you can see, parts I, II, III, and the 1st position of IV don’t have to be taken care of anymore since the IC itself fully covers them. Let’s take a look at the pins recommendation to fulfill the rest of the positions of part IV:

If You want to have your device’s full debug and tracing capabilities, you can apply for the JTAG or SWD connections. The JTAG is not limited to ARM series chips and has more versatile applications for programming, debugging, and production testing, especially a daisy chain topology shown below:

The SWD interface uses fewer pins, requiring only SWDIO and SWCLK connections. The SWO pin is optional and used for tracing data at a minimum cost. Compared to JTAG, SWD offers better overall performance in terms of speed. The STM32WB5MMG module provides a JTAG interface on pins PB4, PB3, PA13, PA14, and PA15, while SWD only uses pins PA13 and PA14. The JTAG and SWD connector pinout foreseen for Cortex MCUs is shown below:

When your electrical schematic design is ready, your chosen CAD software electrical rules constraints (ERC) is worth checking. The best is that it has 0 errors and 0 warnings. In good practice, not only in software programming, we treat all unresolved warnings as errors 😊

The PCB Design

It’s time to go for the most challenging part of our design: the PCB layouts. When we start PCB layouts, we shall begin by asking a couple of questions:

1. What PCB material shall we use?
2. How many layers will we need?
3. How many and what topology of characteristic impedances do we use?
4. Where to place our radio IC on the PCB to make its antenna performance optimized?

What PCB material shall we use?

The following parameters mostly characterize the PCB materials:

1. Dielectric Constant (Dk) – that can be explained as a measure of a material’s ability to store electrical energy in an electric field. The Dk mainly affects signal propagation speed and influences impedance control. Generally speaking, the lower the Dk, the higher the frequency range applications we can design. For the low-frequency materials, typical values are above 6.0. The mid-frequency ones have Dk between 3.5 and 6.0. The high-frequency applications will need Dk from 2.0 to 3.5.
2. Dissipation Factor (Df) – also called loss tangent- represents the energy lost as signals travel through the material. Lower Df values mean higher frequencies can be achieved. The Df determines signal attenuation, affects power consumption, and impacts overall system efficiency. The typical ranges for low-frequency applications are above 0.05. For the middle-range frequency designs, values are between 0.05 and 0.001. The top-performance designs shall use materials with Df less than 0.001.
3. Coefficient of Thermal Expansion (CTE) measures how much a material expands or contracts with temperature changes. CTE mostly affects reliability during thermal cycling, impacts plated through-hole integrity, and influences board warpage.
4. Thermal Conductivity – the ability of a material to conduct heat. High-frequency circuits often generate significant heat, making thermal management a critical consideration. This parameter helps dissipate heat from components, affects overall system reliability, and impacts power handling capacity.
5. Moisture Absorption – this can be defined as a material’s tendency to absorb moisture that can significantly impact its electrical properties, especially at high frequencies. This parameter can significantly change the Dk and Df parameters and impact dimensional stability. As a result, it can play a crucial role in long-term reliability.

The table below summarizes typical materials and their frequency ranges:

Because the chosen radio IC has a maximum frequency range of 2.4 GHz, FR4 would be a reasonable choice for the PCB material. If your radio will need fast serial communication links such as Peripheral Component Interconnect Express (PCIe) or Serial Advanced Technology Attachment (SATA) or external memory support of Double Data Rate (DDR-3 or DDR-4), the FR408 or its higher-speed versions would be preferable. With high-frequency range material, we have to spend more money on our design.

How many layers will we need?

Since we have already decided to go for a 2-layer PCB (we got schematics from the IC manufacturer datasheet) when discussing the electrical schematics section, we will not go into much detail for this section. I will give you only good practice advice such as:

1. When designing your stack, try to understand how many layers you will occupy. It is mostly dictated by the main radio IC and its footprint technology. The more inner rows of pins, the more layers you will need. The good practice is to use one layer per two inner rows. The most difficult footprints are Ball Grid Arrays (BGAs) with ball spacing of less than 1 mm. The most typical Quad Flat No-Lead Packages (QFPs) can be routed using two-layer PCBs. In my example design, due to the Land Grid Array (LGA) footprint and its pad spacing and, of course, a low-cost design assumption, I have decided not to use inner rows GPIOs.
2. If you really need more PCB layers, try to decide the topology (vertical or horizontal) of your routing for each layer and do not change it within a layer. This will ultimately optimize the number of used shorts for vertical interconnect accesses (VIAs).
3. Four- and more-layer PCBs are better designed in a symmetric way, i.e., signal–ground–power–signal. Asymmetric PCB stacks can cause trouble in the manufacturing process and dramatically increase production costs.
4. The good practice for decreasing Electromagnetic Interference (EMI) is to use outer layers for tracing low-speed and mid-frequency range signals while inner layers for the top-performance ones, so-called “good layers.” The common practice is to use the middle layers for power supply distribution networks or so-called “bad layers” (impedance layers created from power planes and under or below layer tracks).
5. nowadays, many tools are available online for stackup design, i.e. isostack proposed by isola group [4]. You can also pick up what your manufacturer offers as a standard available stack, i.e., at jlcpcb [5].

How many and what topology of characteristic impedances do we have to use?

The characteristic impedance is a huge topic, and we could write a book about it, but let’s try to summarize it with the following advice:

1. User-ready impedance calculators offered by Your PCB manufacturer, i.e., jlcpcb [6], or free engineering tools such as Saturn PCB Design [7],
2. Good practice is to use a single track width spacing between single-ended impedance tracks and a single differential pair spacing between differential impedance tracks to keep the crosstalk at aminimum level.

We have four main characteristic impedance topologies available:

1. Coplanar waveguide single-ended – a single track with shielding and underlying (reference) planes. The impedance calculation takes into account the following parameters: dielectric height, Dk, spacing between track and shielding plane, width and height of the track,
2. Coplanar waveguide differential – a differential pair of tracks with shielding and underlying (reference) planes. The impedance calculation takes into account the following parameters: dielectric height, Dk, spacing between tracks within a pair, spacing between tracks and shielding plane, width and height of the tracks,
3. Noncoplanar waveguide single-ended – a single track with an underlying (reference) plane. The impedance calculation takes into account the following parameters: dielectric height, Dk, width and height of the track,
4. Noncoplanar waveguide differential – a differential pair of tracks with an underlying (reference) plane. The impedance calculation considers the following parameters: dielectric height, Dk, spacing between tracks within a pair, and width and height of the tracks.

The table below summarizes the topologies advised for different applications.

Where to place our radio IC on the PCB to make its antenna performance optimized?

The last question to be answered before we start a design is the place of our radio IC with its RF antenna on the PCB. The good practices are:

1. place it as much as possible away from your nearest power supply component, i.e., battery cell, DC-DC converter, etc,
2. define the clearance constraint for your antenna. It is an area of your PCB without any surrounding or underlying copper. There must be no active or passive components other than RF antenna and RF track in this area. In the case of a built-in antenna also, no tracks are possible there,
3. decide a topology and a footprint for your antenna matching circuitry – the good practice is to start with two or three-element matching network architectures, i.e., a T network with small inductors of nH value and a 0 Ohm resistor. The useful can also be a Smith chart Network Analyzer with Voltage Standing Wave Ration (VSWR) and Constant Q (the measure of energy stored in reactance to that being dissipated) Reference Circles provided. Each of the topologies has permissible and forbidden regions. The best matching is achieved when the matched impedance point on the Smith chart is within the VSWR of less than 1.5 and Q of less than 0.5 [9],
4. make a simulation of the Antenna Total Efficiency vs. S11 parameter (input voltage reflection coefficient) for the target frequency range, i.e., 2.4 GHz; the typical values are 90% of efficiency and more than -30 dB for the reflection coefficient [8]. There are available online tools, and companies provide detailed guidelines for your PCB. You only have to provide them with your PCB production files and stackup information.
5. Study your antenna radiation patterns, which are the polar or rectangular coordinates that show antenna suppression sidebands and antenna optimum gain conditions. Values between 0 and -10 dB are foreseen as a good-quality radiation pattern.

Let’s again take a look at what the STM32WB5MMG module can offer when concerning layout recommendations that are provided to us 😊:

We will power supply our IC from the USB-B micro connector. Because the maximum power rating of 500 mA is foreseen for this kind of connector, we shall also define a minimum track width for our power traces.

The last step is to define design rule constraints (DRC) such as the minimum track width, minimum hole and via dimension, or minimum spacing between copper tracks. All that information can be obtained from your PCB manufacturer’s minimum capabilities overview [10]. In this case, we must also have 0 errors and 0 warnings 😊

Conclusions and summarize

As you can see, designing PCB for your Radio design without thinking of EMI issues is not so difficult. In the case of the STM32WB5MMG part, most of the work has been done by a manufacturer, especially in the field of electrical schematics or PCB layouts, but also for the integration of the components. I have also tried to alarm you about all the tiny things. You have to take care of it if the manufacturer does not provide enough output to you, especially in the RF and antenna parts field.

Nevertheless, I hope it will be a good starting point for you and your future radio PCB designs. I have prepared the example schematics with the PCB layouts and ready-to-go production files for You using free KiCAD software. They will be available for you as a reference and attached to this article. Please also have a look soon for the next part of the BLE journey, the Web BLE Api – using designed PCB 😊

References

[1] “STM32WB5MMG datasheet”, DS13252, Rev 7, February 2024

[2] “Differences and Connections Between SWD and JTAG“

[3] “Overview of PCB Properties“

[4] The online PCB stack design tool

[5] The online standard stacks for different numbers of layers

[6] The online tool for characteristic impedance calculation

[7] The online tool for all-in-one PCB parameters calculation

[8] “Design Guide Wi-Fi Antenna Integration,” Ignion^NN, November 2023

[9] “AN1275: Impedance Matching Network Architectures”, Silicon Labs, Rev. 0.1, [10] PCB manufacturer capabilities overview

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